Metallization patterns in integrated circuits couple different components of the integrated circuit. As integrated circuits are increasing in complexity and density, the metallization patterns also increase in density to interconnect components of the integrated circuit. For example, features sizes of metallization patterns are shrinking in size below ten micrometers. As the features sizes continue to shrink, conventional metallization processes may fail resulting in open circuits and short circuits in the integrated circuit.
FIG. 1 is a flow chart illustrating a conventional method for metallization in integrated circuit substrates. The flow chart of FIG. 1 will be presented along with FIGS. 2A-2D, which are cross-sectional views illustrating a conventional integrated circuit. Referring to FIG. 2A, at block 102 a primer-coated copper foil (not shown) on a core substrate 202 is etched to remove the copper foil. At block 104 a copper seed layer 206 is electroless plated on a primer layer 204 remaining from the etched primer-coated copper foil. At block 106 a dry film 208 is deposited on the seed layer 206.
Referring to FIG. 2B, at block 108 the dry film 208 is patterned to form openings 210. At block 110 a conductive film 212 is electrodeposited into the openings 210 on the seed layer 206. Referring to FIG. 2C, at block 112 the dry film 208 is removed. Referring to FIG. 2D, at block 114 the seed layer 206 is etched between the conductive film features 212 to electrically isolate the features.
As the density of metallization lines increases the size of the conductive film features 212 shrinks. Additionally, the size of the dry film features between the conductive film features 212 standing after patterning the dry film, as shown in FIG. 2B, shrinks. As the aspect ratio of the standing dry film features increases, the stability of the dry film patterns decreases. For example, the dry film patterns may fail resulting in an open circuit or short circuit of the metallization pattern.
FIG. 3A is a cross-sectional view illustrating a conventional metallization failure resulting in an open circuit. When the aspect ratio of a pillar 308 of dry film is too large, the pillar 308 may collapse. Collapse of the pillar 308 prevents electrodeposition of conductive material into an opening on at least one side of the collapsed pillar 308. Thus, an open circuit in the metallization pattern may result from the collapsed pillar 308.
FIG. 3B is a cross-sectional view illustrating a conventional metallization failure resulting in a short circuit. When the width of the standing dry film features decreases, poor adhesion, undercut, or other process failure may result in lift-off of a standing dry film feature. For example, the pillar 310 may be lifted-off during patterning of the dry film 208. The lifted-off pillar 310 prevents separation of metallization lines on surrounding sides of the lifted-off pillar 310. Thus, a short circuit in the metallization pattern may result from the lifted-off pillar 310.
One alternative solution is to use a pattern trenched buildup process. During the buildup process, openings are patterned in a dielectric layer into which a seed layer is deposited. The seed layer is used for electrodepositing and overplating a conductive film. The overplated conductive material is removed through a planarization process. However, planarization reduces throughput of the metallization process and can increase infrastructure expense. Additionally, planarization may damage the surface of the dielectric layer.
Thus, there is a need for a method of metallization in integrated circuits supporting smaller feature sizes.